The group of additional instructions with 002200 and 002300 as the prefix permits additional operations to be performed with the various address registers:

002200 100xxx SWBR Swap Base Register 002200 101xxx CBR Compare Base Register 002200 102xxx LBR Load Base Register 002200 103xxx STBR Store Base Register 002200 104xxx ABR Add Base Register 002200 105xxx SBR Subtract Base Register 002200 112xxx LBRA Load Base Register with Address 002200 113xxx XBR XOR Base Register 002200 114xxx NBR AND Base Register 002200 115xxx OBR OR Base Register 002200 120xxx SWSB Swap Scratchpad Base 002200 121xxx CSB Compare Scratchpad Base 002200 122xxx LSB Load Scratchpad Base 002200 123xxx STSB Store Scratchpad Base 002200 124xxx ASB Add Scratchpad Base 002200 125xxx SSB Subtract Scratchpad Base 002200 132xxx LSBA Load Scratchpad Base with Address 002200 133xxx XSB XOR Scratchpad Base 002200 134xxx NSB AND Scratchpad Base 002200 135xxx OSB OR Scratchpad Base 002300 100xxx SWPSB Swap Pointer Scratchpad Base 002300 101xxx CPSB Compare Pointer Scratchpad Base 002300 102xxx LPSB Load Pointer Scratchpad Base 002300 103xxx STPSB Store Pointer Scratchpad Base 002300 104xxx APSB Add Pointer Scratchpad Base 002300 105xxx SPSB Subtract Pointer Scratchpad Base 002300 112xxx LPSBA Load Pointer Scratchpad Base with Address 002300 113xxx XPSB XOR Pointer Scratchpad Base 002300 114xxx NPSB AND Pointer Scratchpad Base 002300 115xxx OPSB OR Pointer Scratchpad Base 002300 120xxx SWASB Swap Array Scratchpad Base 002300 121xxx CASB Compare Array Scratchpad Base 002300 122xxx LASB Load Array Scratchpad Base 002300 123xxx STASB Store Array Scratchpad Base 002300 124xxx AASB Add Array Scratchpad Base 002300 125xxx SASB Subtract Array Scratchpad Base 002200 132xxx LASBA Load Array Scratchpad Base with Address 002200 133xxx XASB XOR Array Scratchpad Base 002200 134xxx NASB AND Array Scratchpad Base 002200 135xxx OASB OR Array Scratchpad Base

These instructions are available as is from Normal Mode and Compact Mode. In Simple Mode, the prefix 002200 becomes 122000, and the prefix 002300 becomes 123000.

The LBRA instruction, as well as the LSBA, LPBSA, and LASBA instructions, instead of inspecting the contents of the location it refers to, merely places its address in the base register whose number is indicated by the dR field. When the base register field of an LBRA instruction is zero, rather than loading a three-bit register address in a base register, the LBRA instruction has a 32-bit address field following the first 16 bits of the instruction, and the entire immediate value is loaded into the base register selected by the destination register field of the instruction. If a nonzero index register value is selected, its contents are still added to the immediate value.

In addition, this prefix is used to create multiple-register instructions for the scratchpad pointer registers:

002300 162xxx xxxxx1 LMUS Load Multiple Scratchpad 002300 163xxx xxxxx1 STMUS Store Multiple Scratchpad 002300 164xxx xxxxx1 LMUPS Load Multiple Pointer Scratchpad 002300 165xxx xxxxx1 STMUPS Store Multiple Pointer Scratchpad 002300 166xxx xxxxx1 LMUAS Load Multiple Array Scratchpad 002300 167xxx xxxxx1 STMUAS Store Multiple Array Scratchpad

As well, some additional integer arithmetic instructions are made available with this prefix:

002200 016xxx GFMB Galois Field Multiply Byte 002200 036xxx GFMH Galois Field Multiply Halfword 002300 016xxx GFM Galois Field Multiply 002300 036xxx GFML Galois Field Multiply Long

This instruction takes an even-numbered register as its destination. The product of the source and the destination, in a form of multiplication in which XOR replaces addition, is first calculated, and then the result is reduced to a length in bits one less than that of the modular polynomial by XORing it with the modular polynomial whenever its first bit is a 1 outside that length.

The modular polynomial, except for its last bit, which must be a 1, is taken from the register following the destination register. In the case of the GFML instruction, the following register pair is used, and the destination must be either register 0 or register 4.