The group of additional instructions with 173701 as the prefix permits additional operations to be performed with the various address registers:
173701 100xxx SWBR Swap Base Register 173701 101xxx CBR Compare Base Register 173701 102xxx LBR Load Base Register 173701 103xxx STBR Store Base Register 173701 104xxx ABR Add Base Register 173701 105xxx SBR Subtract Base Register 173701 112xxx LBRA Load Base Register with Address 173701 113xxx XBR XOR Base Register 173701 114xxx NBR AND Base Register 173701 115xxx OBR OR Base Register 173701 120xxx SWSB Swap Scratchpad Base 173701 121xxx CSB Compare Scratchpad Base 173701 122xxx LSB Load Scratchpad Base 173701 123xxx STSB Store Scratchpad Base 173701 124xxx ASB Add Scratchpad Base 173701 125xxx SSB Subtract Scratchpad Base 173701 132xxx LSBA Load Scratchpad Base with Address 173701 133xxx XSB XOR Scratchpad Base 173701 134xxx NSB AND Scratchpad Base 173701 135xxx OSB OR Scratchpad Base 173701 140xxx SWPSB Swap Pointer Scratchpad Base 173701 141xxx CPSB Compare Pointer Scratchpad Base 173701 142xxx LPSB Load Pointer Scratchpad Base 173701 143xxx STPSB Store Pointer Scratchpad Base 173701 144xxx APSB Add Pointer Scratchpad Base 173701 145xxx SPSB Subtract Pointer Scratchpad Base 173701 152xxx LPSBA Load Pointer Scratchpad Base with Address 173701 153xxx XPSB XOR Pointer Scratchpad Base 173701 154xxx NPSB AND Pointer Scratchpad Base 173701 155xxx OPSB OR Pointer Scratchpad Base 173701 160xxx SWASB Swap Array Scratchpad Base 173701 161xxx CASB Compare Array Scratchpad Base 173701 162xxx LASB Load Array Scratchpad Base 173701 163xxx STASB Store Array Scratchpad Base 173701 164xxx AASB Add Array Scratchpad Base 173701 165xxx SASB Subtract Array Scratchpad Base 173701 172xxx LASBA Load Array Scratchpad Base with Address 173701 173xxx XASB XOR Array Scratchpad Base 173701 174xxx NASB AND Array Scratchpad Base 173701 175xxx OASB OR Array Scratchpad Base
The LBRA instruction, as well as the LSBA, LPBSA, and LASBA instructions, instead of inspecting the contents of the location it refers to, merely places its address in the base register whose number is indicated by the dR field. When the base register field of an LBRA instruction is zero, rather than loading a three-bit register address in a base register, the LBRA instruction has a 32-bit address field following the first 16 bits of the instruction, and the entire immediate value is loaded into the base register selected by the destination register field of the instruction. If a nonzero index register value is selected, its contents are still added to the immediate value.
In addition, this prefix is used to create multiple-register instructions for the scratchpad pointer registers:
173701 152xxx LMUS Load Multiple Scratchpad 173701 153xxx STMUS Store Multiple Scratchpad 173701 154xxx LMUPS Load Multiple Pointer Scratchpad 173701 155xxx STMUPS Store Multiple Pointer Scratchpad 173701 156xxx LMUAS Load Multiple Array Scratchpad 173701 157xxx STMUAS Store Multiple Array Scratchpad
As well, some additional integer arithmetic instructions are made available with this prefix:
173701 016xxx GFMB Galois Field Multiply Byte 173701 036xxx GFMH Galois Field Multiply Halfword 173701 056xxx GFM Galois Field Multiply 173701 076xxx GFML Galois Field Multiply Long
This instruction takes an even-numbered register as its destination. The product of the source and the destination, in a form of multiplication in which XOR replaces addition, is first calculated, and then the result is reduced to a length in bits one less than that of the modular polynomial by XORing it with the modular polynomial whenever its first bit is a 1 outside that length.
The modular polynomial, except for its last bit, which must be a 1, is taken from the register following the destination register. In the case of the GFML instruction, the following register pair is used, and the destination must be either register 0 or register 4.