Variant Alignment Modes

This section contains the descriptions of the additional set of addressing modes for which instructions, instead of being aligned on 16-bit boundaries, are subject to a different alignment restriction.

At this time, five such modes are listed here, two of which are aligned on 32-bit boundaries:

01100000 Aligned Instruction Mode

01100110 General Register Mode

and three aligned on 8-bit boundaries:

01111000 Three-Address RISC Mode

01111100 Flexible CISC Mode
01111101 Stack Machine Mode

and these modes are described in the sections below:

• Aligned Instruction Mode
• General Register Mode
• Three-Address RISC Mode
• Flexible CISC Mode
• Stack Machine Mode

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