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Condensed Mode

In Condensed Mode, the register-to-register and memory-reference instructions follow the scheme shown below:

This mode includes short-format memory-reference instructions. Unlike the case in Compact Mode, however, they refer to an area in memory of 512 bytes rather than 1,024 bytes. Also, not only are the unnormalized floating-point operations omitted, which are not usable with the standard floating-point format, but as well only the most common arithmetic operations are provided for integer operands; AND, OR, and XOR are not available with short-format memory-reference instructions in this mode.

As well, like Local Mode, there are 16-bit instructions which allow one to select both a register as the destination, and one of the supplementary registers as the source. Here, however, instead of all eight arithmetic/index registers or all eight floating-point registers being selectable, only registers 0 to 3 may be chosen. On the other hand, a seven-bit opcode instead of a six-bit opcode is used, which may begin with 00, 01, or 10, but not 11, thus providing all major opcodes except those for the unnormalized floating-point instructions.

As in Compact Mode, only a subset of the usual 32-bit operate instructions are available, and some have been modified to exclude indexing.

The 32-bit memory-reference instructions include indexed instructions which have arithmetic/index register 0 or floating-point register 0 as their destination, and load/store instructions that can have any of the 64 supplementary registers as their destination.

Since the option offered in other modes of specifying a destination register instead of an index register is not available here, it should be noted, though, that if 0 is specified as the index register in the indexed instructions, that will mean that indexing does not take place.

The idea behind this mode is to include both 16-bit memory-reference instructions, and 16-bit instructions for operations involving the scratchpad registers. The intent is, on the one hand, to offer the features of a RISC instruction set with the 64 supplementary registers (by including the two-address vector and extended type instructions, 32-bit instructions that have a supplementary register as their source and as their destination are available) while also offering the features of a typical CISC instruction set, and on the other hand, to make it possible for as much as possible of a program to be coded as 16-bit instructions instead of 32-bit instructions.

The opcodes of the memory-reference and register-to-register instructions in this format are:

Indexed                Register   Scratchpad Short Format
--------------------   ------     ------     ------
160x1x xxxxxx          0000xx     1000xx     040xxx     SWB    Swap Byte
161x1x xxxxxx          0001xx     1004xx     041xxx     CB     Compare Byte
162x1x xxxxxx          0002xx     1010xx     042xxx     LB     Load Byte
163x1x xxxxxx                     1014xx     043xxx     STB    Store Byte
164x1x xxxxxx          0004xx     1020xx     044xxx     AB     Add Byte
165x1x xxxxxx          0005xx     1024xx     045xxx     SB     Subtract Byte

170x1x xxxxxx          0010xx     1040xx                IB     Insert Byte
171x1x xxxxxx          0011xx     1044xx                UCB    Unsigned Compare Byte
172x1x xxxxxx          0012xx     1050xx                ULB    Unsigned Load Byte
173x1x xxxxxx          0013xx     1054xx                XB     XOR Byte
174x1x xxxxxx          0014xx     1060xx                NB     AND Byte
175x1x xxxxxx          0015xx     1064xx                OB     OR Byte

177x1x xxxxxx          0017xx     1074xx                STGB   Store if Greater Byte

160x3x xxxxx0 (xxx0)   0020xx     1100xx     050xx0     SWH    Swap Halfword
161x3x xxxxx0 (xxx0)   0021xx     1104xx     051xx0     CH     Compare Halfword
162x3x xxxxx0 (xxx0)   0022xx     1110xx     052xx0     LH     Load Halfword
163x3x xxxxx0 (xxx0)              1114xx     053xx0     STH    Store Halfword
164x3x xxxxx0 (xxx0)   0024xx     1120xx     054xx0     AH     Add Halfword
165x3x xxxxx0 (xxx0)   0025xx     1124xx     055xx0     SH     Subtract Halfword
166x3x xxxxx0 (xxx0)   0026xx     1130xx     056xx0     MH     Multiply Halfword
167x3x xxxxx0 (xxx0)   0027xx     1134xx     057xx0     DH     Divide Halfword

170x3x xxxxx0 (xxx0)   0030xx     1140xx                IH     Insert Halfword
171x3x xxxxx0 (xxx0)   0031xx     1144xx                UCH    Unsigned Compare Halfword
172x3x xxxxx0 (xxx0)   0032xx     1150xx                ULH    Unsigned Load Halfword
173x3x xxxxx0 (xxx0)   0033xx     1154xx                XH     XOR Halfword
174x3x xxxxx0 (xxx0)   0034xx     1160xx                NH     AND Halfword
175x3x xxxxx0 (xxx0)   0035xx     1164xx                OH     OR Halfword
176x3x xxxxx0 (xxx0)   0036xx     1170xx                MEH    Multiply Extensibly Halfword
177x3x xxxxx0 (xxx0)   0037xx     1174xx                DEH    Divide Extensibly Halfword

160x3x xxxxx1 (xx01)   0040xx     1200xx     050xx1     SW     Swap
161x3x xxxxx1 (xx01)   0041xx     1204xx     051xx1     C      Compare
162x3x xxxxx1 (xx01)   0042xx     1210xx     052xx1     L      Load
163x3x xxxxx1 (xx01)              1214xx     053xx1     ST     Store
164x3x xxxxx1 (xx01)   0044xx     1220xx     054xx1     A      Add
165x3x xxxxx1 (xx01)   0045xx     1224xx     055xx1     S      Subtract
166x3x xxxxx1 (xx01)   0046xx     1230xx     056xx1     M      Multiply
167x3x xxxxx1 (xx01)   0047xx     1234xx     057xx1     D      Divide

171x3x xxxxx1 (xx01)   0051xx     1244xx                UC     Unsigned Compare

173x3x xxxxx1 (xx01)   0053xx     1254xx                X      XOR
174x3x xxxxx1 (xx01)   0054xx     1260xx                N      AND
175x3x xxxxx1 (xx01)   0055xx     1264xx                O      OR
176x3x xxxxx1 (xx01)   0056xx     1270xx                ME     Multiply Extensibly
177x3x xxxxx1 (xx01)   0057xx     1274xx                DE     Divide Extensibly

160x3x xxxxx3 (x011)   0060xx     1300xx     050xx3     SWL    Swap Long
161x3x xxxxx3 (x011)   0061xx     1304xx     051xx3     CL     Compare Long
162x3x xxxxx3 (x011)   0062xx     1310xx     052xx3     LL     Load Long
163x3x xxxxx3 (x011)              1314xx     053xx3     STL    Store Long
164x3x xxxxx3 (x011)   0064xx     1320xx     054xx3     AL     Add Long
165x3x xxxxx3 (x011)   0065xx     1324xx     055xx3     SL     Subtract Long
166x3x xxxxx3 (x011)   0066xx     1330xx     056xx3     ML     Multiply Long
167x3x xxxxx3 (x011)   0067xx     1334xx     057xx3     DL     Divide Long

171x3x xxxxx3 (x011)   0071xx     1344xx                UCL    Unsigned Compare Long

173x3x xxxxx3 (x011)   0073xx     1354xx                XL     XOR Long
174x3x xxxxx3 (x011)   0074xx     1360xx                NL     AND Long
175x3x xxxxx3 (x011)   0075xx     1364xx                OL     OR Long
176x3x xxxxx3 (x011)   0076xx     1370xx                MEL    Multiply Extensibly Long
177x3x xxxxx3 (x011)   0077xx     1374xx                DEL    Divide Extensibly Long

160x5x xxxxx0 (xxx0)   0100xx     1400xx     060xx0     SWM    Swap Medium
161x5x xxxxx0 (xxx0)   0101xx     1404xx     061xx0     CM     Compare Medium
162x5x xxxxx0 (xxx0)   0102xx     1410xx     062xx0     LM     Load Medium
163x5x xxxxx0 (xxx0)              1414xx     063xx0     STM    Store Medium
164x5x xxxxx0 (xxx0)   0104xx     1420xx     064xx0     AM     Add Medium
165x5x xxxxx0 (xxx0)   0105xx     1424xx     065xx0     SM     Subtract Medium
166x5x xxxxx0 (xxx0)   0106xx     1430xx     066xx0     MM     Multiply Medium
167x5x xxxxx0 (xxx0)   0107xx     1434xx     067xx0     DM     Divide Medium

170x5x xxxxx0 (xxx0)   0110xx                           MEUM   Multiply Extensibly Unnormalized Medium
171x5x xxxxx0 (xxx0)   0111xx                           DEUM   Divide Extensibly Unnormalized Medium
172x5x xxxxx0 (xxx0)   0112xx                           LUM    Load Unnormalized Medium
173x5x xxxxx0 (xxx0)   0113xx                           STUM   Store Unnormalized Medium
174x5x xxxxx0 (xxx0)   0114xx                           AUM    Add Unnormalized Medium
175x5x xxxxx0 (xxx0)   0115xx                           SUM    Subtract Unnormalized Medium
176x5x xxxxx0 (xxx0)   0116xx                           MUM    Multiply Unnormalized Medium
177x5x xxxxx0 (xxx0)   0117xx                           DUM    Divide Unnormalized Medium

160x5x xxxxx1 (xx01)   0120xx     1440xx     060xx1     SWF    Swap Floating
161x5x xxxxx1 (xx01)   0121xx     1444xx     061xx1     CF     Compare Floating
162x5x xxxxx1 (xx01)   0122xx     1450xx     062xx1     LF     Load Floating
163x5x xxxxx1 (xx01)              1454xx     063xx1     STF    Store Floating
164x5x xxxxx1 (xx01)   0124xx     1460xx     064xx1     AF     Add Floating
165x5x xxxxx1 (xx01)   0125xx     1464xx     065xx1     SF     Subtract Floating
166x5x xxxxx1 (xx01)   0126xx     1470xx     066xx1     MF     Multiply Floating
167x5x xxxxx1 (xx01)   0127xx     1474xx     067xx1     DF     Divide Floating

170x5x xxxxx1 (xx01)   0130xx                           MEU    Multiply Extensibly Unnormalized
171x5x xxxxx1 (xx01)   0131xx                           DEU    Divide Extensibly Unnormalized
172x5x xxxxx1 (xx01)   0132xx                           LU     Load Unnormalized
173x5x xxxxx1 (xx01)   0133xx                           STU    Store Unnormalized
174x5x xxxxx1 (xx01)   0134xx                           AU     Add Unnormalized
175x5x xxxxx1 (xx01)   0135xx                           SU     Subtract Unnormalized
176x5x xxxxx1 (xx01)   0136xx                           MU     Multiply Unnormalized
177x5x xxxxx1 (xx01)   0137xx                           DU     Divide Unnormalized

160x5x xxxxx3 (x011)   0140xx     1500xx     060xx3     SWD    Swap Double
161x5x xxxxx3 (x011)   0141xx     1504xx     061xx3     CD     Compare Double
162x5x xxxxx3 (x011)   0142xx     1510xx     062xx3     LD     Load Double
163x5x xxxxx3 (x011)              1514xx     063xx3     STD    Store Double
164x5x xxxxx3 (x011)   0144xx     1520xx     064xx3     AD     Add Double
165x5x xxxxx3 (x011)   0145xx     1524xx     065xx3     SD     Subtract Double
166x5x xxxxx3 (x011)   0146xx     1530xx     066xx3     MD     Multiply Double
167x5x xxxxx3 (x011)   0147xx     1534xx     067xx3     DD     Divide Double

170x5x xxxxx3 (x011)   0150xx                           MEUD   Multiply Extensibly Unnormalized Double
171x5x xxxxx3 (x011)   0151xx                           DEUD   Divide Extensibly Unnormalized Double
172x5x xxxxx3 (x011)   0152xx                           LUD    Load Unnormalized Double
173x5x xxxxx3 (x011)   0153xx                           STUD   Store Unnormalized Double
174x5x xxxxx3 (x011)   0154xx                           AUD    Add Unnormalized Double
175x5x xxxxx3 (x011)   0155xx                           SUD    Subtract Unnormalized Double
176x5x xxxxx3 (x011)   0156xx                           MUD    Multiply Unnormalized Double
177x5x xxxxx3 (x011)   0157xx                           DUD    Divide Unnormalized Double

160x5x xxxxx7 (0111)   0160xx     1540xx     060xx7     SWQ    Swap Quad
161x5x xxxxx7 (0111)   0161xx     1544xx     061xx7     CQ     Compare Quad
162x5x xxxxx7 (0111)   0162xx     1550xx     062xx7     LQ     Load Quad
163x5x xxxxx7 (0111)   0163xx     1554xx     063xx7     STQ    Store Quad
164x5x xxxxx7 (0111)   0164xx     1560xx     064xx7     AQ     Add Quad
165x5x xxxxx7 (0111)   0165xx     1564xx     065xx7     SQ     Subtract Quad
166x5x xxxxx7 (0111)   0166xx     1570xx     066xx7     MQ     Multiply Quad
167x5x xxxxx7 (0111)   0167xx     1574xx     067xx7     DQ     Divide Quad

170x5x xxxxx7 (0111)   0170xx                           MEUQ   Multiply Extensibly Unnormalized Quad
171x5x xxxxx7 (0111)   0171xx                           DEUQ   Divide Extensibly Unnormalized Quad
172x5x xxxxx7 (0111)   0172xx                           LUQ    Load Unnormalized Quad
173x5x xxxxx7 (0111)   0173xx                           STUQ   Store Unnormalized Quad
174x5x xxxxx7 (0111)   0174xx                           AUQ    Add Unnormalized Quad
175x5x xxxxx7 (0111)   0175xx                           SUQ    Subtract Unnormalized Quad
176x5x xxxxx7 (0111)   0176xx                           MUQ    Multiply Unnormalized Quad
177x5x xxxxx7 (0111)   0177xx                           DUQ    Divide Unnormalized Quad

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